Telius 304 Polysilicon

The Telius 304 Polysilicon is an etch system manufactured by Tokyo Electron. The Telius 304 Polysilicon is configured for 12-inch wafer processing. The Telius 304 Polysilicon is categorized as a polysilicon etch system.^[1][2][3]

The Telius 304 Polysilicon is a plasma etch tool that processes wafers inside a vacuum chamber. Process gases are introduced into the reaction chamber, where an electrical field energizes them into a plasma. Ions and reactive species from the plasma remove exposed polysilicon while the masking material protects the remaining areas.

Etch uniformity across the wafer is controlled by reactor pressure, gas-flow distribution, plasma power, and chamber temperature. The system typically processes wafers individually in a load-locked chamber, which limits exposure to ambient air. Endpoint detection and optical emission monitoring can be used to stop the etch when the polysilicon layer is cleared.

The Telius 304 Polysilicon is used in the front end of semiconductor wafer manufacturing. Polysilicon etching follows the deposition of the poly-Si film and the patterning of a photoresist or hard mask. After the etch, subsequent steps include resist removal, cleaning, and thermal processing such as oxidation, silicidation, or dopant activation.

In transistor fabrication, the polysilicon etch defines the gate electrode over the gate dielectric. The same etch step can also define capacitor plates and other poly-Si features in memory cell arrays. Selectivity to the underlying gate oxide and critical-dimension control are primary process requirements for this step.

The Telius 304 Polysilicon is applied to polysilicon layer patterning in integrated-circuit fabrication. Typical applications include gate electrode etch, capacitor electrode etch, and the formation of polysilicon local interconnects.

The etch process is used on patterned wafers with photoresist masks, oxide hard masks, or nitride masks. Polysilicon etching supports both logic and memory process flows where polycrystalline silicon is a structural layer.